1. Field of the Invention
The present invention relates to nonvolatile memory (NVM) cells, and in particular to programming methods for NVM cells.
2. Description of the Related Art
Conventional programming methods for NVM cells based upon P-channel insulated gate field effect transistors (P-IGFETs), such as P-type metal oxide semiconductor field effect transistors (P-MOSFETs), are based upon hot electron injection occurring (with the source electrode grounded) at large negative drain electrode potentials of approximately −5 volts along with a negative gate electrode potential. The injection current has a maximum magnitude with respect to the gate electrode voltage and is smaller at low and large negative gate voltages. Conventional methods bring the floating gate voltage to a low negative value, at which the electron injection begins and produces an increasingly negative value of floating gate voltage, which in turn, produces more electron injections, and so on. This self-supporting mechanism ceases, however, when the floating gate voltage has passed through its maximum value to a negative value where the electron injection becomes negligible. This programming effect is equal to the width of the gate voltage zone where injection is non-negligible, depends on drain voltage, and, as such, is limited (e.g., approximately 2.5 volts).